Issue Description
S5720 access switches stack issue
Switch 1 is connected with switch 2 on 2 *10G Ports. Switch 1 Port XGE0/0/3 and XGE0/0/4 are connected with Switch 2 XGE1/0/3 and XGE 1/0/4. When we connected the stack cable it shows the logic ports should not same error and stacking Failed.
Alarm Information
same logic ports error
Handling Process
1)
[switch-01] display version
Huawei Versatile Routing Platform Software
VRP (R) software, Version 5.170 (S5720 V200R019C10SPC500)
Copyright (C) 2000-2020 HUAWEI TECH Co., Ltd.
HUAWEI S5720-52X-PWR-SI-AC Routing Switch uptime is 0 weeks, 1 day, 2 hours, 2 minutes
ES5D2V52S003 0(Master) : uptime is 0 week, 1 day, 2 hours, 0 minute
DDR Memory Size: 512 M bytes
FLASH Total Memory Size: 512 M bytes
FLASH Available Memory Size: 241 M bytes
Pcb Version: VER.C
BootROM Version : 0213.0000
BootLoad Version : 0213.0000
CPLD Version: 0110
Software Version: VRP (R) Software, Version 5.170 (V200R019C10SPC500)
FLASH Version: 0000.0000
PWR1 information
Pcb Version: PWR VER.A
2) Display stack
Switch 01 = 150 Priority
Switch 02 = 100
[switch-01]display stack
Slot of the active management port: —
Slot Role MAC Address Priority Device Type
————————————————————-
0 Master x.x.x.x 150 S5720-52X-PWR-SI-AC
[switch-02]display stack
Slot of the active management port: —
Slot Role MAC Address Priority Device Type
————————————————————-
0 Master x.x.x.x 100 S5720-52X-PWR-SI-AC
3)
[switch-01]display stack port
*down: administratively down
(r) : Runts trigger error down
(c) : CRC trigger error down
(l): Link-flapping trigger error down
(m): Media mismatch trigger error down
Logic Port Phy Port Online Status
—————————————————————————-
stack-port0/1 XGigabitEthernet0/0/3 present up
XGigabitEthernet0/0/4 present up
[switch-02]display stack port
*down: administratively down
(r) : Runts trigger error down
(c) : CRC trigger error down
(l): Link-flapping trigger error down
(m): Media mismatch trigger error down
Logic Port Phy Port Online Status
—————————————————————————-
stack-port1/1 XGigabitEthernet1/0/3 present up
XGigabitEthernet1/0/4 present up 3
Root Cause
Logic Port Wrong I change Logic Stack port from 1/1 to 1/2 after this switch 2 restart and stacked successfully
[ACSW-01-2]display stack
Stack mode: Service-port
Stack topology type: Link
Stack system MAC: x.x.x.x
MAC switch delay time: 10 min
Stack reserved VLAN: 4093
Slot of the active management port: —
Slot Role MAC Address Priority Device Type
————————————————————-
0 Master x.x.x.x 150 S5720-52X-PWR-SI-AC
1 Standby x.x.x.x 100 S5720-52X-PWR-SI-A
2)
[ACSW-01-2]display stack port
*down: administratively down
(r) : Runts trigger error down
(c) : CRC trigger error down
(l): Link-flapping trigger error down
(m): Media mismatch trigger error down
Logic Port Phy Port Online Status
—————————————————————————-
stack-port0/1 XGigabitEthernet0/0/3 present up
XGigabitEthernet0/0/4 present up
stack-port1/2 XGigabitEthernet1/0/3 present up
XGigabitEthernet1/0/4 present up
Solution
Solution: Change Interface stack 1/1 to Interface 1/2 on switch 2
[ACSW-02]
Remove Ports from Stack 1/1 and add them to Stack 1/2
Interface stack 1/1
shutdown interface XGE 1/0/3 to XGE 1/0/4 after this undo from stack 1/1 by using undo port interface XGE 1/0/3 to XGE1/0/4 enable
Interface stack 1/2
Port add interface XGE1/0/3 to XGE 1/0/4 to enable
[ACSW-01-2]display stack
Stack mode: Service-port
Stack topology type: Link
Stack system MAC: x.x.x.x
MAC switch delay time: 10 min
Stack reserved VLAN: 4093
Slot of the active management port: —
Slot Role MAC Address Priority Device Type
————————————————————-
0 Master x.x.x.x 150 S5720-52X-PWR-SI-AC
1 Standby x.x.x.x 100 S5720-52X-PWR-SI-A
2)
[ACSW-01-2]display stack port
*down: administratively down
(r) : Runts trigger error down
(c) : CRC trigger error down
(l): Link-flapping trigger error down
(m): Media mismatch trigger error down
Logic Port Phy Port Online Status
—————————————————————————-
stack-port0/1 XGigabitEthernet0/0/3 present up
XGigabitEthernet0/0/4 present up
stack-port1/2 XGigabitEthernet1/0/3 present up
XGigabitEthernet1/0/4 present up
Suggestions
Please use different Logic stack Ports for stacking
Leave a comment